@inproceedings{karanjai2024tpu,
title={Tpu as cryptographic accelerator},
author={Karanjai, Rabimba and Shin, Sangwon and Xiong, Wujie and Fan, Xinxin and Chen, Lin and Zhang, Tianwei and Suh, Taeweon and Shi, Weidong and Kuchta, Veronika and Sica, Francesco and others},
booktitle={Proceedings of the International Workshop on Hardware and Architectural Support for Security and Privacy 2024},
pages={37--44},
year={2024}
}Copied to clipboardCryptographic schemes like Fully Homomorphic Encryption (FHE) and Zero-Knowledge Proofs (ZKPs), while offering powerful privacy-preserving capabilities, are often hindered by their computational complexity. Polynomial multiplication, a core operation in these schemes, is a major performance bottleneck. While algorithmic advancements and specialized hardware like GPUs and FPGAs have shown promise in accelerating these computations, the recent surge in AI accelerators (TPUs/NPUs) presents a new opportunity. This paper explores the potential of leveraging TPUs/NPUs to accelerate polynomial multiplication, thereby enhancing the performance of FHE and ZKP schemes. We present techniques to adapt polynomial multiplication to these AI-centric architectures and provide a preliminary evaluation of their effectiveness. We also discuss current limitations and outline future directions for further performance improvements, paving the way for wider adoption of advanced cryptographic tools.